Research Directions

Hardware-Software Co-Design and Acceleration


Hardware-Software Co-Design is a methodology that integrates the design processes of hardware and software to create optimized systems. This approach aims to achieve higher performance, lower power consumption, and improved flexibility by developing hardware and software components concurrently. Specific acceleration techniques are as follows: 1. Hardware Accelerators: Use dedicated hardware units like FPGAs or ASICs for critical tasks. 2. Parallelism: Exploit parallel processing using multi-core processors or GPUs/FPGAs. 3: Optimization Algorithms: Fine-tune components to reduce execution time and power consumption. 4: Custom Instruction Sets: Design custom instructions for efficient software execution.

In-Memory Computing Architecture Design


In-Memory Computing (IMC) architecture integrates data storage and computation within the same physical space, addressing the von Neumann bottleneck by reducing data transfer. This significantly lowers latency and power consumption, enhancing performance and energy efficiency, especially for data-intensive tasks like AI and big data analytics. IMC uses both analog and digital techniques and is ideal for applications where power savings are critical, such as IoT and edge devices. It scales efficiently with data size, making it suitable for modern computing needs. IMC is a groundbreaking solution that offers substantial improvements in performance, energy efficiency, and scalability for next-generation computing.

Chip Security


Chip security is critical in protecting integrated circuits from various threats such as hacking, counterfeiting, and reverse engineering. It involves implementing measures like secure boot, encryption, and hardware-based security modules to safeguard sensitive data and intellectual property. Techniques such as Physical Unclonable Functions (PUFs) provide unique identifiers for chips, enhancing authentication and anti-counterfeiting measures. Secure chip design also includes tamper detection and response mechanisms to prevent unauthorized access and modifications. Ensuring chip security is essential for applications in smartphones, IoT devices, financial systems, and military equipment, where data integrity and confidentiality are paramount.